Verification Engineer working at Axelera AI ensuring quality and performance of complex multi-market AI accelerators. Collaborates with teams to maintain high standards in RTL designs.
Responsibilities
Join a team responsible for the verification of in-house designed, complex, multi-market AI accelerators.
Guarantee RTL designs are matching specifications and requirements.
Define, implement and execute verification plans to ensure designs meet quality and performance goals.
Build and maintain automated verification environments.
Collaborate and communicate regarding verification status, project progress, and issue resolution.
Work closely with designers, architects and software engineers to develop effective and pragmatic approaches to complex problems.
Contribute to technical directions on all aspects of the verification domain.
Requirements
A degree in electronics engineering, electrical engineering, computer science or other relevant discipline.
A minimum of 3 years of experience in ASIC or FPGA verification.
Proficiency in SystemVerilog, C/C++ or Python for designing and implementing testbenches.
Experience with commercial simulation and formal verification tools and in UVM or CocoTB is an advantage.
Proficiency in scripting languages such as Python, shell or Tcl for automation.
Demonstrated ability to work closely with architecture, RTL design, and software teams to ensure comprehensive verification coverage.
Strong analytical and problem-solving skills.
Good written and verbal communication skills in English.
Benefits
Attractive compensation package
Pension plan
Extensive employee insurances
Option to get company shares
Open culture that supports creativity and continual innovation
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