Structural BIM Engineer responsible for preparing and reviewing shop drawings. Collaborating with architects and civil engineers to ensure compliance with design specifications and codes.
About the role
- STA Engineer at NVIDIA developing industry-leading high-speed communication devices. Involve in DFT STA execution, tackling static timing analysis and working on innovative chip designs.
Responsibilities
- DFT STA execution, from rtl driven constraints and definitions through DFT constraints quality assurance to STA sign-off
- Be part of a unique team of experts who have deep understanding in all aspects of pre and post silicon
- Be exposed and work on a variety of challenging designs, unique DFT solutions that require deep silicon implementation understanding
- Daily work involves all aspects of static timing analysis - constraints, environment, models generation and timing ECO generation for block level and full chip level
- Taking part in flows development
Requirements
- B.SC. in Electrical Engineering/Computer Engineering
- 2-3 years of experience as STA engineer
- Ability to quickly adapt to new technology and go deep into new areas
- Strong communication skills
- Great teammate
- Drive new solutions based on any issues that arise
- Knowledge in physical design flows and methodologies (PNR, STA, physical verification)
- Knowledge in DFT flows such as ATPG, Mbist, Ijtag
- Prior experience in DFT timing closures
- Knowledge in CDC
- Familiarity with physical design EDA tools (such as Synopsys, Cadence, etc.)
Benefits
- Enjoy working in a meaningful, growing and highly professional environment
- Make a significant impact in a technology-focused company
Job title
Job type
Experience level
Salary
Not specified
Degree requirement
Location requirements
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