Director, Design Verification leading a new verification and emulation team in India for innovative semiconductor solutions. Collaborating across global teams to develop and drive verification strategies.
Responsibilities
Build, lead, and grow a verification and emulation engineering team in India, owning hiring, mentoring, and retention from day one
Collaborate with US-based architecture, design, and verification leads to develop verification strategies for complex SoCs, chiplets, and multi-generation product roadmaps
Own the verification of complex systems end-to-end—from verification planning through coverage closure and tapeout
Drive the technical direction of the team: developing innovative verification strategies, maintaining high-quality code standards, and pushing the state of the art in methodology and automation
Develop and maintain long-term verification plans spanning multiple product generations
Own schedules, define progress metrics, and provide clear visibility into execution status across sites
Provide hands-on technical mentorship, actively identifying improvements in methodologies, techniques, and infrastructure
Partner with software and emulation teams to enable HW-SW co-development and accelerate silicon validation
Lead DV, emulation and post silicon validation execution with zero defect mindset.
Define DV, emulation and post silicon validation scope.
Define execution timelines working closely with stakeholders.
Set goals, monitor, and take steps to keep the execution on track.
Define DV methodology and verification strategies.
Drive definition and implementation of DV TB architectures.
Collaborate with Architecture, Design, DFT, PD, FW and system teams for successful product execution.
Lead tool evaluation and selection.
Drive continuous productivity improvements through incremental and forklift changes.
Monitoring industry DV trends and adapting to key trends.
Hire, build and retain high performance engineering team.
Address continuous training and development needs of the team.
Requirements
BS degree or higher in Electrical Engineering, Computer Engineering, or Computer Science with 15+ years of relevant industry experience in semiconductor verification or emulation
10+ years of experience managing Design Verification, Emulation, or related engineering teams
Demonstrated ability to recruit, mentor, and retain strong verification and emulation engineers—people want to come work with you
Capable of leading technical direction while staying hands-on: developing verification strategies, reviewing code, and making architectural decisions
Strong experience with cross-site team coordination and collaboration
Excellent communication skills with the ability to operate effectively across time zones and organizational boundaries
Preferred: Experience with full-chip verification, development, and emulation of complex designs targeting data center, server, or enterprise networking applications
Expert-level experience developing verification infrastructure for IP, subsystem, chiplet, and SoC-level environments
Experience with one or more high-speed I/O technologies: DDR, PCIe, CXL, or Ethernet
Knowledge of industry-standard SoC components: bus fabrics, I/O devices, and processor subsystems
Knowledge of HW-SW co-development workflows and silicon validation cycles
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