Mechanical Engineer in Bengaluru or Noida designing, analyzing, and optimizing products in the gas power portfolio. Collaboration on project execution, validation, and continuous improvement initiatives.
About the role
- Physical Design Engineer at Kandou redefining AI infrastructure with scalable, chiplet-based technology. Leading design processes ensuring high-volume silicon production with innovative methodologies.
Responsibilities
- Work closely with the Architecture, RTL, DFT teams to ensure first-time-right high-volume silicon production
- Timing constraints improvement and timing constraints validation, signoff
- Static Timing Analysis and block-level timing closure
- Synthesis, block level floor-planning, power grid design, place & route, clock tree synthesis, electromigration / IR-Drop analysis, power/signal integrity analysis, crosstalk analysis, formal equivalence checking and physical verification (DRC / LVS / Antenna)
- Participate in developing improvements to scripts/methodologies/flows
- Interact closely with the design team to understand requirements and implement solutions as also helping on providing design views for use with digital PD flows (LIB, LEF, DEF, GDS, SPEF, etc.)
- Support IP and chip level integration
- Support and interact with customers on requirements and IP delivery
- Manage workload and schedule and report to internal management team
Requirements
- 10+ years’ experience in the semiconductor industry
- Min. 5 years in a digital Physical Design technical leadership role
- Experience on modern semiconductor process technologies including 28nm, 14/16nm, 7nm
- Experienced user of EDA tools for design and verification such as, Cadence Genus and Innovus, LEC, Calibre/PVS DRC/LVS, parasitics extraction, EM and IR drop, ESD, etc.
- Expertise in Timing Constraints and Static Timing Analysis (STA)
- Experience in CPF/UPF technologies and flows is highly desirable
- Exposure to flip-chip package technologies and wire bond package technologies
- Experience in hierarchical floor planning and implementation
- Experience in release management and tape out procedures
- Experience in library setup and flow development with focus on cross project reusability
- Experience in DFT methodologies and implementation schemes
- Good understanding of RTL to GDS implementation flow (synthesis, P&R, LEC, PV)
- Self-motivated, with strong sense of ownership and responsibility.
- Good scripting capabilities (shell, TCL, Python, make) and good understanding of data management (revision control system)
Benefits
- Health insurance
- Retirement plans
- Paid time off
- Flexible work arrangements
- Professional development
Job title
Job type
Experience level
Salary
Not specified
Degree requirement
Tech skills
Location requirements
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