Mid-Level Digital Design Engineer working at Kandou to develop advanced communication and memory interfaces. Collaborating on high-speed digital design with semiconductor industry experience.
Responsibilities
Define digital architecture concepts and specify analog-to-digital interfaces.
Develop RTL for high-speed digital blocks and contribute to IP verification and basic DFT implementation.
Perform logic synthesis and support timing analysis activities.
Design and verify high-performance digital circuits meeting area, timing, and power requirements.
Develop block-level specifications based on system-level requirements.
Collaborate closely with verification, physical implementation, and analog/mixed-signal engineering teams.
Analyse and implement high-speed serial protocols (e.g., USB4, PCIe).
Support post-silicon bring-up, debugging, characterization, and productization.
Validate and test silicon in laboratory environments.
Requirements
B.E/B.Tech./B.S/M.E/M.Tech/M.S in Electrical Engineering, Electronics, Communications, VLSI, Microelectronics or related field.
5–10 years of semiconductor industry experience in digital design.
Proven experience in high-speed digital circuit design using deep-submicron CMOS technologies.
Experience designing digital circuits for multi-gigabit serial data-link transceivers, DDR, or high-performance memory interfaces.
Experience with industry-standard EDA tools for design, simulation, and verification.
Strong background in complex digital system design and verification.
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