Automotive Safety Engineer ensuring compliance with safety standards for CPU IP in next-gen vehicles. Collaborating with cross-functional teams to integrate safety throughout the product lifecycle.
Responsibilities
Lead safety analysis and risk assessment for automotive and industrial CPU/IP/Custom SOC products, including microarchitecture-level designs, ensuring compliance with ISO 26262/IEC 61508 and related safety standards
Collaborate cross-functionally with Architecture, Micro-architecture, software, and systems engineering teams to integrate functional safety requirements throughout the product lifecycle—from architecture definition through verification and release
Develop and document safety requirements, safety plans, and safety cases for IP and SoCs targeting safety-critical automotive applications
Conduct and review detailed safety analyses such as FMEA, Fault Tree Analysis, and dependent failure analysis specifically tailored to CPU and SOC microarchitecture and implementations
Guide design teams in decision making and implementing effective safety mechanisms, redundancy strategies, and error detection/correction mechanisms at the microarchitecture level
Interface with customers and external assessors to address technical queries, support audits, and resolve compliance issues related to automotive functional safety
Stay current with the latest trends in automotive safety, semiconductor design, and microarchitecture innovations, providing technical leadership and mentoring within the safety engineering team
Build a Safety Team and Competency to drive automotive safety in the organization including creating templates, guidelines, process improvements and microarchitecture innovations.
Requirements
Bachelor’s or master’s degree in electrical engineering, Computer Engineering, Computer Science, or a related field
Minimum 7-10 years of experience in system, hardware, CPU, SOC development within the automotive semiconductor industry, with a focus on functional safety
Deep understanding of microarchitecture, including knowledge of CPU/GPU architectures, bus/interconnect protocols, memory hierarchies, and safety-critical design practices
Hands on experience, in Fault analysis, Fault grading, FIT rate assessment, including ability to disposition strategies to overcome the inadequacies in the design
Proven track record with ISO 26262/IEC 61508: Experience in applying the standard throughout the development lifecycle, especially at the semiconductor IP and SoC level
Strong analytical and problem-solving skills: Ability to identify, assess, and mitigate safety risks in complex IP/chip architectures
Excellent communication and documentation skills: Capable of producing clear, comprehensive safety documentation and explaining technical concepts to diverse stakeholders
Collaborative mindset: Comfortable working in global, cross-disciplinary teams and engaging directly with customers and partners.
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