Senior Staff Validation Engineer ensuring next-gen mixed-signal processing ICs meet performance standards. Join Cirrus Logic and shape the future of audio and power management technology.
Responsibilities
Develop comprehensive validation plans for IP and chip-level test cases based on datasheets and collaboration with design and systems engineers.
Participate in design and architecture reviews, recommending Design-for-Validation (DFV) hooks to maximize coverage.
Design FPGA emulation and silicon validation boards, and review layouts before fabrication.
Build automation frameworks and scripts (Python, C, etc.) to streamline validation and regression testing.
Execute pre- and post-silicon tests on lab benches to verify functionality and performance.
Expand test coverage across multiple products and firmware releases.
Collaborate with cross-functional teams and provide technical guidance to junior engineers.
Analyze test results using tools like Spotfire or JMP and assist in debugging ATE test issues.
Requirements
BS in Electrical/Computer Engineering with 10+ years of experience, or MS with 7+ years.
Experience in FPGA-based emulation, pre/post-silicon validation, and mixed-signal IP design/validation.
Proficiency with automation and scripting (Python, C, or similar).
Hands-on experience with lab equipment (oscilloscopes, signal generators, analyzers).
Strong knowledge of analog/digital design, power electronics, and mixed-signal building blocks (ADCs, DACs, PLLs, amplifiers, LDOs, SMPSs).
Self-motivated, detail-oriented, and excellent problem-solving abilities.
Benefits
Cirrus Logic strives to select the best qualified applicant for any opening.
Different approaches, ideas and points of view are both valued and respected.
Employment decisions are made on the basis of job-related criteria without regard to race, color, religion, sex, national origin, age, protected veteran or disabled status, genetic information, or any other classification protected by applicable law.
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