Senior Supplier Performance Engineer supporting the fabrication of Electrical and Instrumentation & Control components at Westinghouse. Performing supplier oversight and ensuring compliance with technical and quality requirements.
About the role
- ASIC DFT Engineer responsible for all aspects of DFT for ASIC designs at Northrop Grumman. Engaging in defining test strategy, developing architecture, and responsible for advanced methodology.
Responsibilities
- Responsible for all aspects of DFT (Design for Test) for ASIC designs
- Responsible for defining the overall test strategy and test plan
- Responsible for developing DFT architecture and implementation, including scan, logic BIST, memory BIST and repair, hierarchical test, boundary scan, and ATPG
- Responsible for advanced DFT methodology and flow development
Requirements
- Bachelor’s degree with 8 years of experience, a Master’s degree with 6 years of experience or a Ph.D. with 4 years of experience in Science, Technology, Engineering, Mathematics, or related technical fields; an additional 4 years of experience may be considered in lieu of a degree.
- U.S. Citizenship is required
- Ability to obtain/maintain an active secret clearance
- Experience in full product life cycle of ASIC Design
- Experience with Cadence and/or Mentor test insertion and ATPG tools
- Experience with hierarchical scan testing, IEEE-1500 and/or IEEE-1687, test compression, JTAG IEEE-1149.1 and IEEE-1149.6 (AC JTA)
- Experience with memory BIST and logic BIST
- Experience generating test patterns and analyzing and debugging test failures
- Experience working with test engineers to implement ATPG vectors on tester hardware
- Proficiency in HDL (VHDL/Verilog/SystemVerilog) and scripting languages such as Tcl, Python or Perl
Benefits
- Medical, Dental & Vision coverage
- 401k
- Educational Assistance
- Life Insurance
- Employee Assistance Programs & Work/Life Solutions
- Paid Time Off
- Health & Wellness Resources
- Employee Discounts
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