Senior Verification Engineer in AI SoC Development at Intel. Ensuring functionality and robustness of ASIC designs for AI workloads through verification and collaboration.
Responsibilities
Perform functional logic verification of integrated SoCs
Define and develop scalable and reusable block, subsystem, and SoC verification plans
Execute verification plans and define and run emulation and system simulation models
Collaborate with SoC architects, microarchitects, full chip architects, RTL developers, postsilicon, and physical design teams
Document test plans and drive technical reviews
Maintain and improve existing functional verification infrastructure and methodology
Requirements
Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or Computer Science
7+ years of experience in ASIC/SoC verification
Expertise in SystemVerilog and UVM methodology
Strong understanding of digital design concepts, clock domain crossings, and power management
Experience with verification of complex SoCs, including CPU subsystems and standard bus protocols (AXI, AHB)
Familiarity with industry standard EDA tools, including simulators (VCS, Questa, Xcelium), coverage analysis tools, and modern waveform debug environments
Scripting skills (Python, Perl, TCL) for automation
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