Chassis Driveline Engineer supporting design, development, and validation of driveline systems for Hyundai vehicles. Collaborating with cross - functional teams to ensure reliability and performance.
About the role
- Senior Middleware Development Engineer at Intel designing next-gen communication libraries for high-performance computing. Collaborating with teams to optimize software for scientific computing and AI systems.
Responsibilities
- Design, develop, and maintain features and optimizations primarily focused on Intel SHMEM (Shared Memory Access)
- Optimize software for exceptional performance: low latency, high bandwidth, and maximum reliability
- Collaborate directly with scientists and engineers on the Aurora supercomputer at Argonne National Labs
- Make meaningful contributions that advance scientific computing and machine learning capabilities
- Partner with cross-functional teams to define software requirements and technical specifications
- Drive performance optimizations that push the boundaries of what's possible in high-performance computing
Requirements
- Bachelor's degree in Computer Science, Electrical Engineering, Computer Engineering, Mathematics, or STEM-related field
- 3+ years of relevant industry, internship, or research experience
- 3+ years of C and C++ programming experience
- 3+ years of Linux development experience
- Experience with multithreaded programming
- Experience in one or more of the following:
- Distributed computing systems
- HPC (High-Performance Computing) communications libraries
- Collective communications libraries (i.e., MPI, oneCCL/NCCL, SHMEM)
- GPU software development
- Network communications stack development
- Post-graduate degree in Computer Science, Computer Engineering, Electrical Engineering, Mathematics, or STEM field preferred
Benefits
- Competitive pay
- Stock bonuses
- Health insurance
- Retirement plans
- Vacation
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Degree requirement
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Location requirements
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