Interface Configuration Specialist optimizing pension system interfaces for TELUS Health. Collaborating with analysts and QA teams to ensure compliance and quality in configuration solutions.
About the role
- Mixed Signal Design Verification Engineer at Intel responsible for verifying mixed signal logic components. Collaborating with architects and improving verification infrastructure in innovative technology solutions.
Responsibilities
- Performs functional verification of mixed signal logic components
- Develops IP verification plans, test benches, and the verification environment
- Executes verification plans and defines and runs system simulation models
- Replicates, root causes, and debugs issues in the presilicon environment
- Finds and implements corrective measures to resolve failing tests
- Collaborates with digital and analog architects, RTL developers, and physical design teams
- Documents test plans and drives technical reviews of plans and proofs
- Maintains and improves existing functional verification infrastructure and methodology
Requirements
- Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field with 3+ years of experience - OR - Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field with 2+ years of experience
- Experience in Digital logic experience
- Experience in VHDL/Verilog/System Verilog
- Experience in Testbench component development (preferably in OVM/UVM), and design debugging skills
- 7+ years of related experience (Preferred)
- Analog debug skills (Preferred)
Benefits
- Competitive pay
- Stock bonuses
- Health
- Retirement
- Vacation
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