Hybrid Design Verification Engineer

at EdgeCortix

• Job title: Design Verification Engineer
• Job type: Full Time
• Experience level: Mid level, Senior
• Salary: Not specified
• Degree requirement: Bachelor's Degree
• Tech skills: Jenkins, Perl, Python
• Location requirements: Hybrid, Kawasaki, Japan

About the role

• Design Verification Engineer joining EdgeCortix to enhance verification environments for next-gen AI SoCs. Collaborating with design teams to redefine AI at the edge.

Responsibilities

• This role is part of the EdgeCortix Artificial Intelligence Hardware Accelerator Team
• Working closely with the design architecture team and contributing to IP, performance and SoC related verification.
• Playing a key role in development of verification infrastructure, which would involve VIPs, different memory models, monitors, etc.
• Writing configurable testbenches in SystemVerilog/UVM and testbench automation.
• Writing System verilog assertions and maintaining them.
• Writing functional coverage and overall functional and code coverage analysis.
• Working on ASIC power estimation and power-aware verification.
• Automating tool flows and creation of result reports.

Requirements

• 6-7 years of experience in functional verification of blocks/systems using SystemVerilog/UVM.
• Strong understanding of verification techniques including assertions, metric-driven and coverage-driven verification.
• Experience in developing full verification infrastructure from scratch.
• Experience with verification of systems which involve high-speed buses such as AXI4.
• Experience with gate level simulations and delay modeling.
• Experience with constraint random verification.
• Experience with writing functional coverage and overall code coverage analysis.
• Experience with coverage-driven verification methodology.
• Experience in writing and debugging System Verilog assertions.
• Strong experience in debugging RTL and testbenches.
• Prior experience in working with VIPs and verification environments that involve VIPs.
• Prior experience in verifying IPs/systems, which include PCI-E/DDR (any) protocol.
• Experience with SoC-level verification.
• Experience in using Continuous Integration tools such as Jenkins, Gitlab CI, Circle CI.
• Experience with synthesis tools such as Cadence Genus.
• Experience with power analysis tools such as Cadence Joules.
• Experience with equivalence checking tools such as Cadence Conformal.
• Prior Experience in working with Standard Cell libraries.
• Experience with scripting languages such as Perl/Python.

Benefits

• Highly competitive salary and stock options
• Flex work time and ability to work fully remotely
• Support for obtaining a visa and relocation support (in case of non-remote)