About the role

  • Digital Design expert leading complex challenges in semiconductor space. Designing, implementing, and ensuring the correctness of advanced digital systems and microarchitecture.

Responsibilities

  • Lead Functional Specification Development for advanced digital systems
  • Design and implement Microarchitecture (uArch) for high-performance blocks
  • Perform RTL Debugging, ensuring design correctness and efficiency
  • Run and analyze Lint Checks and CDC (Clock Domain Crossing) Checks
  • Collaborate with verification, physical design, and architecture teams
  • (Bonus) Contribute to Front-End Synthesis and optimization
  • (Nice to have) Experience working on SoC-level integration and design
  • (Nice to have) Apply Power Optimization Techniques for energy-efficient designs

Requirements

  • 7+ years of hands-on experience in digital design
  • Strong knowledge of Verilog and/or VHDL
  • Familiarity with SystemVerilog is a plus
  • Experience with tools like Cadence Genus, Synopsys Design Compiler (DC), or Fusion Compiler is a plus
  • Proven experience in RTL design, uArch development, and functional specs
  • Deep understanding of linting tools, CDC methodologies, and debugging flows
  • Familiarity with synthesis tools and SoC design is a strong plus
  • Bachelor's degree in EE, ECE, CE, CS, or a related field required
  • MS or PhD highly desired

Benefits

  • medical care with Medicover
  • private life insurance
  • Sports card
  • Capgemini Helpline offering therapeutical support
  • access to over 70 training tracks with certification opportunities
  • free access to Education First languages platform, Pluralsight, TED Talks, Coursera and Udemy Business materials and trainings
  • continuous feedback and ongoing performance discussions

Job title

RTL Developer

Job type

Experience level

SeniorLead

Salary

Not specified

Degree requirement

Bachelor's Degree

Location requirements

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