Onsite IC Package Design – Development

Posted 6 hours ago

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About the role

  • IC Packaging Engineer responsible for next-generation package architecture and design solutions. Collaborating with cross-functional teams to ensure optimal performance and reliability in semiconductor applications.

Responsibilities

  • Collaborate with chip design and analog/digital IP/PHY teams to optimize chip floorplan, die bump patterns, and IO architecture for advanced node products.
  • Co-optimize package stack-up, layer count, escape routing, BGA pattern, and power integrity architecture aligned to system and manufacturing requirements.
  • Interpret SI/PI parameters (RL, IL, NEXT/FEXT, etc.) to drive signal integrity optimization.
  • Work with IC design, system engineering, SI/PI, and thermal teams to perform BGA substrate design using Cadence APD or equivalent tools.
  • Ensure package designs meet SI/PI, mechanical, high-power thermal and reliability targets.
  • Define and refine assembly BOM, process flows, and design rules for advanced packaging technologies.
  • Define POR for new silicon nodes including bump metallization, geometry, and process requirements.
  • Drive implementation, optimization, and HVM qualification of new package / assembly technologies.
  • Own packaging deliverables from concept through substrate design, development, qualification, and high-volume manufacturing.
  • Lead interactions with assembly, substrate, and manufacturing partners for NPI bring-up and production ramp.
  • Provide sustaining support during HVM, including multi-source enablement.
  • Work closely with QA, product/test engineering, and customer teams to diagnose and resolve quality, reliability, or manufacturing issues.

Requirements

  • Bachelors and 8+ years or Masters degree and 6+ years or PhD and 3+ years of related experience
  • BS/MS/PhD in Electrical Engineering (Preferred), Mechanical Engineering, Materials Science, or related field.
  • Extensive hands-on experience in advanced IC packaging for advanced silicon nodes.
  • Expertise in substrate design, SI/PI principles, thermal management, and high-speed IO packaging.
  • Strong understanding of high layer count, large body, flip chip BGA packaging technology
  • Proficiency in Cadence Allegro APD/SIP or comparable packaging design tools.
  • Experience working with global OSATs and substrate suppliers.
  • Proven ability to drive NPI through HVM with strong cross-functional leadership.
  • Excellent communication, documentation, and customer-facing skills.

Benefits

  • Medical, dental and vision plans
  • 401(K) participation including company matching
  • Employee Stock Purchase Program (ESPP)
  • Employee Assistance Program (EAP)
  • company paid holidays
  • paid sick leave and vacation time

Job title

IC Package Design – Development

Job type

Experience level

SeniorLead

Salary

$108,000 - $192,000 per year

Degree requirement

Bachelor's Degree

Tech skills

Location requirements

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