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Hybrid Lead Analog & Mixed-Signal Layout Engineer
Posted 2 weeks ago
About the role
- Responsible for the layout of cutting edge, high performance, high speed CMOS data converters in foundry CMOS process nodes in 2nm, 3nm, 5nm, 6nm, 7nm, 16nm, and 28nm.
Requirements
- 10+ years experience in high performance analog layout in advance CMOS process nodes
- Experience with layouts of high performance and high speed analog blocks (such as ADC, DAC, PLL, and SERDES, for example)
- Experience with analog layout techniques such as common centroid, interdigitation, shielding, dummy devices, EM aware routing on critical block, and must be versed with VXL compliant methodology
- Familiarity in various physical verification checks DRC, LVS, DFM, ERC, EM, IR etc.
- Layout Automation using SKILL/PERL/Python is a plus
- Self starter with the ability to define and adhere to schedule and methodology
- Should be able to lead the project.
- Must possess strong social skill and be an excellent team mate
Benefits
- Excellent compensation
Job title
Job type
Experience level
Salary
Not specified
Degree requirement
No Education Requirement
Tech skills
Location requirements
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