Digital Engineering Data Solutions Architect developing next generation Relational Cross Domain Data Digital Engineering Architecture at Draper. Working on multidisciplinary teams for national security solutions.
About the role
- ASIC Engineer in SOC design automation at NVIDIA, tackling complex positions in networking chips. Collaborating within cross-functional teams for effective chip-level design implementation.
Responsibilities
- Implement chip level design through collaboration with cross-functional teams (Functional Design, DFT, Design Verification, System Verification, STA, and Physical Design).
- Be exposed and work on a variety of functional and structural challenges. Including functional debug, physical design readiness, emulation, resolve design quality issues.
- Daily work involves aspects of chip level design, including partitioning, CDC, RDC, trial synthesis, design quality checks.
- Taking part in flows development and deployment.
Requirements
- B.SC./ M.SC. in Electrical Engineering/Computer Engineering
- 2+ years proven experience in chip design
- Solid hands-on RTL design skills in System-Verilog
- Proficiency in at least one scripting languages like python, bash, tcl.
- Great teammate
- Passion for quality.
- Experience with delivery to physical design, emulation, firmware and other customers
Benefits
- NVIDIA has some of the most forward-thinking people in the world working for us.
Job title
Job type
Experience level
Salary
Not specified
Degree requirement
Tech skills
Location requirements
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