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About the role
- Verification Engineer verifying memory subsystem designs at NVIDIA. Collaborating with designers and verification teams to ensure architecture correctness and implementation quality.
Responsibilities
- verify the design and implementation of our state of the art memory subsystem for our mobile SoCs and GPUs
- responsible for verification of memory subsystem or coherent high speed interconnect design, architecture, golden models and micro-architecture using advanced verification methodologies
- understand the design & implementation, define the verification scope, develop the verification infrastructure (Testbenches, BFMs, Checkers, Monitors), execute test/coverage plans, and verify the correctness of the design
- Collaborate with architects, designers, emulation and silicon verification teams to accomplish your tasks
Requirements
- Completing or recently completed a Bachelors or Masters Degree in Electrical Engineering, Computer Engineering or related field (or equivalent experience)
- Experience in architecting test bench environments for unit level verification.
- Exposure to verification using random stimulus along with functional coverage and assertion-based verification methodologies.
- Prior Design or Verification experience of dynamic memory controllers or coherent high speed interconnects.
- C++ programming language experience, scripting ability and an expertise in System Verilog.
- Exposure to design and verification tools (VCS or equivalent simulation tools, debug tools like Debussy, GDB).
- Strong debugging and analytical skills.
- Strong communication and interpersonal skills are required.
Benefits
- equity
- benefits
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