Systems Designer creating applications and systems that meet USG business requirements. Collaborating with teams to ensure product availability, reliability, and functionality in corporate IT.
About the role
- Engineer I - Design at Microchip Technology Inc, responsible for RTL-based block design and verification. Engaging in general RTL and ASIC development with a focus on high-speed design techniques.
Responsibilities
- Designing, simulating, and verifying various RTL-based blocks on our devices.
- General RTL and ASIC development.
- Detailed module design, performance analysis, and detailed design specification creation.
- Participate in the RTL implementation, synthesis, simulation, pre-layout/post-layout timing verification.
- Understanding of emerging high speed design techniques to improve Data & Command processing bandwidth, reduce latencies & increase reliability.
- Support porting the design into test chips and emulation platforms – experience with FPGA design and board implementation tools is advantageous.
Requirements
- Bachelor’s in Electrical Engineering, Computer Engineering or Computer Science.
- Design courses and practical application of course learning for high-speed RTL design.
- Experience with RTL Design tools that include design entry, synthesis, formal verification, RTL/gate level simulation, cross-domain clocking analysis and static timing analysis.
- Course and Practical usage in RTL design, design verification, synthesis & formality.
- Proficiency in SystemVerilog development languages.
- Course and Practical usage in Static Timing Analysis and Verilog simulation tools.
- Should be able to design complex state machines & data path logic.
- Proficiency in scripting languages (TCL / Perl / Python) and LINUX.
- Ability to understand and implement industry standards.
- Ability to write detailed design specifications.
- Good analytical, oral and written communication skills.
- Able to write clean, readable presentations.
- Self-motivated, proactive team player.
- Ability to work to schedule requirements.
- Preferred Master’s in Electrical Engineering, Computer Engineering or Computer Science.
- FPGA and ASIC System On Chip Design Experience.
- Lab Experience for system-level validation.
Benefits
- Competitive base pay
- Restricted stock units
- Quarterly bonus payments
- Health benefits that begin day one
- Retirement savings plans
- Industry leading ESPP program with a 2 year look back feature
Job title
Job type
Experience level
Salary
Degree requirement
Tech skills
Location requirements
Analog IC Design Engineer designing sophisticated CMOS transceiver/SERDES products in a key team. Responsibilities include architectural investigations and design verification using industry standard tools.
Graphic Designer creating innovative graphics for apparel across Catalyst Brands’ lifestyle labels. Collaborating with teams to develop seasonal concepts that resonate with the target customer.
Electrical Designer III creating electrical designs and specifications for building projects at ENFRA. Collaborating with project teams to ensure high - quality and timely delivery of energy solutions.
Senior Technical Designer shaping AI - forward tools and systems for game developers. Collaborating on AAA game systems and emerging AI workflows with Unity and Unreal Engine.
Early Career Application Designer at Gainwell designing and developing applications for healthcare improvement. Collaborating with teams to deliver innovative technology solutions for clients' needs.
Senior Technical Advisor providing engineering expertise for traffic design projects at HNTB. Requires advanced knowledge and 12 years of experience or higher in engineering with a relevant degree.
Game Designer creating Online & Outdoor Escape Games for B2B clients. Responsible for design, story, and game flow in a flexible working environment.
PowerPoint Designer at pilot creating compelling pitch presentations. Collaborating with teams to visualize data and enhance storytelling for effective client engagement.
Operational Designer focused on enhancing field - service processes for smart and sustainable buildings. Collaborating closely with teams to optimize workflows and ensure effective IT implementation.