Bridge Inspector/Design Engineer role combining field leadership in bridge inspections and contributions to bridge design. Requires strong foundation in structural engineering and inspection practices.
About the role
- Senior Specialist, Electrical Engineer developing FPGA Firmware for L3Harris. Focusing on satellite communication links, digital telemetry, and signal processing technologies.
Responsibilities
- Responsible for developing FPGA Firmware in the Space & MIssion Systems (SMS) Segment of L3Harris.
- Support proposal efforts in the estimation and planning of end-to-end FPGA development.
- Decompose and allocate system and box-level requirements to FPGA requirements and specifications.
- Architect solutions against requirements and implement those solutions in various FPGA technologies or platforms.
- Design Med/High Complexity Field Programmable Gate Array (FPGA) starting from System De-composition and completing through System Integration and Test
- Follow, enforce, and refine consistent firmware development processes across FPGA designs.
- Synthesize designs to targeted technologies and perform constraint driven place and route and analysis.
- Generate design review and deliverable documentation including review packages, block diagrams, interface control documents, and test plans/procedures.
- Conduct design peer reviews at various phases in the development process.
- Ensure FPGA simulations verify performance, then integrate and test the FPGA on the circuit card assembly.
- Generate verification plans and procedures to validate hardware.
- Perform hardware testing and debug.
Requirements
- Bachelors of Science Degree in Electrical/Computer Engineering with 6 years' professional experience or a Graduate degree and a minimum of 4 years' relevant professional experience.
- In lieu of a degree, minimum of 10 years' of prior related experience
- 6+ years experience using VHDL/Verilog
- 6+ years experience with and understanding of AMD Xilinx FPGA architectures
- 3+ Years of professional experience with Xilinx Vivado
- 3+ years experience performing timing closure, optimizing FPGA resource utilization
- 3+ years experience debugging down to the hardware level, using Signal Generators, Logic Analyzers, Digital Oscilloscopes and Embedded FPGA Debugging tools
- Preferred Additional Skills: FPGA development and Verification Vendor tool suites: Xilinx ISE, Xilinx Vivado, Xilinx Vitis, Microchip Libero, Mentor Graphics ModelSim/Questa, Synopsis Synplicity Version Control tools such as GIT, SVN, CVS.
- Experience with advanced verification environments such as UVM & OVM
- Experience using System Verilog for verification
- Build FPGAs with difficult timing and/or difficult routing constraints
- Develop FPGA requirements and specifications
- FPGA Device Selection and supporting the Pinout on a new CCA Design
- High speed memory interfaces and/or high speed SERDES interfaces
- Analog to Digital (AD) and Digital to Analog (DA) interfaces
- Experience with AXI streaming and control buses
- Possess the ability to interface with Hardware, Software, and Systems Engineering
- Self-motivated individual with the ability to work and communicate effectively within a development group
- Bring-up of advanced FPGA products such as SoC, MPSoC, RFSoC, ACAP, etc.
- Digital Circuit Card Design: Schematic Entry, PCB/PWB Layout/Route, Signal Integrity Analysis.
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