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About the role
- Design Verification Engineer for Cirrus Logic, focusing on ASIC functional verification and innovation. Join a diverse team in Austin, Texas to tackle complex engineering challenges.
Responsibilities
- Functional verification on custom mixed-signal ASICs
- Developing detailed verification plans, methodology, and test-bench infrastructure
- Developing constraint-random and directed tests, scoreboards, and checks
- Coverage implementation, analysis, and closure
- You will perform regression triage, failure analysis, and resolution
- Running gate-level simulations, analyzing and resolving fails and timing violations
- Working closely with digital/analog designers, systems, applications, and manufacturing test engineers to support both pre-silicon verification and post-silicon validation efforts
Requirements
- Bachelor’s degree in Electrical or Computer Engineering and 7+ years of experience working on block-level or chip-level design verification for ASICs.
- Strong background with HDLs (e.g. Verilog, VHDL) and HVLs (e.g. SystemVerilog/UVM, OVM, AVM, Vera)
Benefits
- Cirrus Logic strives to select the best qualified applicant for any opening. Different approaches, ideas and points of view are both valued and respected.
- Employment decisions are made on the basis of job-related criteria without regard to race, color, religion, sex, national origin, age, protected veteran or disabled status, genetic information, or any other classification protected by applicable law.
Job title
Job type
Experience level
Salary
Not specified
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Location requirements
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