Digital Design Engineer at semify specializing in ASICs and FPGAs. Collaborating with clients, optimizing designs and implementing verification methodologies for high - quality digital solutions.
About the role
- Hands-on physical design block owner from RTL to GDS.
- Floorplan exploration with guidance and collaboration with front-end and architecture teams.
- STA: work with FE and floor planner to manage block and top level constraints and 1st level of timing analysis.
- Synthesis exploration and final synthesis netlist: Scan insertion @ synthesis, clean checks from Lint, UPF & Spyglass.
- Place & Route: from Synthesis netlist to final layout and signoff verification with target to achieve best power performance and area.
Requirements
- BSc or MSc degree in Computer Engineering or Electrical Engineering.
- 2+ years of experience in Physical Design.
- Experience in scripting languages like Tcl/python/Perl/tcsh.
- Team player with excellent communication skills, customer orientation, and a “can-do” attitude.
- Building or maintaining implementation tools and flow – Advantage.
Benefits
- Health insurance
- Flexible work arrangements
- Professional development
Job title
Job type
Experience level
Salary
Not specified
Degree requirement
Tech skills
Location requirements
BG
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