Mechanical Designer focusing on mechanical designs and documentation for laser enrichment projects, collaborating with multiple engineering teams in a secure environment.
About the role
- IP Design Verification Engineer developing verification plans and testbenches for Intel's SoC IP; debugging presilicon issues and collaborating with architects and RTL teams.
Responsibilities
- Performs functional verification of IP logic to ensure design will meet specification requirements.
- Develops IP verification plans, test benches, and the verification environment to ensure coverage to confirm to microarchitecture specifications.
- Executes verification plans and defines and runs system simulation models to verify the design, analyze power and timing, and uncover bugs.
- Replicates, root causes, and debugs issues in the presilicon environment.
- Finds and implements corrective measures to resolve failing tests.
- Collaborates with architects, RTL developers, and physical design teams to improve verification of complex architectural and microarchitectural features.
- Documents test plans and drives technical reviews of plans and proofs with design and architecture teams.
- Maintains and improves existing functional verification infrastructure and methodology.
- Participates in the definition of verification infrastructure and related TFMs needed for functional design verification.
Requirements
- Graduate Computer Science/Electronics/Mathematics
- Minimum 7 years of experience in verification domain
- e (Specman) and/or SV languages
- Experience with industry-standard EDA tools and simulation environments
- High programming and debugging skills
- Knowledge of Digital Integrated Circuits
- Knowledge of Hardware Description Languages (VHDL/Verilog) desired
- Knowledge of scripting tools and languages (Perl, python)
- Knowledge of development tools (DVT, versioning tools)
- Proficiency with OOP (C++, Java)
- Good communication skills and strong interpersonal skills
- Preferred: Knowledge of AI/ML integration in verification workflows
- Preferred: Familiarity with Formal methodology and tools
- Preferred: Debugging RTL failures
- Requirements may be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.
Benefits
- This role is available as a fully home-based and generally would require you to attend Intel sites only occasionally based on business need.
- However, you must live and work from the country specified in the job posting, in which Intel has a legal presence.
- Due to legal regulations, remote work from any other country is unfortunately not permitted.
Job title
Job type
Experience level
Salary
Not specified
Degree requirement
Tech skills
Location requirements
CADD Technician supporting Transportation practice in Midvale, UT. Producing detailed utility and roadway plans for transportation projects at Michael Baker International.
Facilities Layout CAD Designer supporting multi - building campuses in Fort Worth, TX. Developing 2D CAD layouts and coordinating with various stakeholders to ensure accurate and updated documentation.
Looking for a passionate Computer Science and Design teacher at H - Farm Vicenza. Engage students with creative teaching and mentor their academic growth.
PCB CAD Design Specialist at EXFO designing circuit board layouts and collaborating with engineers to optimize high - speed signal performance. Involves working closely with manufacturing partners and simulation specialists.
PCB CAD Design Specialist at EXFO designing high - speed printed circuit boards for telecommunications. Collaborating with engineering teams to optimize PCB designs for performance and manufacturability.
Intern assisting engineers in designing, developing, and characterizing RFICs for high - volume RFFE products. Focus on applications like 5G NR and emerging connectivity technologies.
Supervising a team executing capital projects of $40 - 50MM a year at a refinery. Ensuring profitability, safety, and reliability in project execution and design.
Graphic Designer creating marketing materials for OC Transpo. Responsible for designs related to public transport services and brand identity.
Junior IC Design Engineer at Swave Photonics, contributing to holographic chip design and characterization. Engaging in analog and mixed - signal circuit design, verification, and testing.