Senior Principal Mechanical Engineer at Northrop Grumman focusing on design solutions for the Sentinel program. Involves cross - team collaboration and technical expertise in engineering.
About the role
- Design Engineer creating and modifying CAD models in CATIA V5 for aerospace projects. Supporting structural design and collaborating with senior engineers on various programs.
Responsibilities
- Support design activities using **VPM/PASS** tools
- Create, modify, and maintain **CAD models and drawings in CATIA V5**
- Support **structural design** of aircraft sections and components
- Prepare, maintain, and control **technical documentation**
- Participate in **design reviews** and cross-functional engineering activities
- Contribute to continuous improvement of **design, verification, and validation processes**
- Support integration of designs into the **digital product structure (VPM / 3DEXPERIENCE)**
- Collaborate with senior engineers on **commercial and defense aerospace programs**
- Interface with **clients and customers**
- Lead and support a **design engineering team**
Requirements
- Bachelor's degree in **Mechanical Engineering, Aerospace Engineering**, or a related discipline
- Minimum **3 years of professional experience** in aerospace engineering or a related field
- Solid knowledge of **VPM/PASS** tools
- Solid knowledge of **TAKSY**
- Solid knowledge of **High-Lift systems (Wing Movables)**
- **A350 program experience** is highly valuable
- Knowledge of **ATA 57** and **ATA 27** is a strong advantage
- Proficiency in **CATIA V5** (experience with **Full3D** is an advantage)
- Sound understanding of **aircraft structures and aerospace design processes**
- Experience working **directly with clients and customers**
- **Demonstrated leadership experience**
- Strong communication skills and ability to work effectively in an **international environment**
Benefits
- Collaboration with team player colleagues in a pleasant family atmosphere with modern technology and equipment, short decision paths and flat hierarchies
- Development opportunities
- Attractive remuneration in line with the market, an occupational pension scheme, 30 days of holiday
- Grant to "Deutschlandticket" (public transportation)
Job title
Job type
Experience level
Salary
Not specified
Degree requirement
Location requirements
Staff Mixed - Signal Design Engineer developing ADC, DAC, and SerDes PHY subsystems. Collaborate to design transistor - level mixed - signal circuits and conduct effective design reviews.
Principal Mixed - Signal Design Engineer developing ADC, DAC, and SerDes PHY subsystems for SoC IC products. Leading the design and implementation of mixed - signal integrated circuits in a global semiconductor company.
Principal Mixed - Signal Design Engineer developing ADC, DAC, and SerDes PHY subsystems for advanced SoC products. Working with leading technologies in a top semiconductor company.
Principal RF Design Engineer developing radar receiver, exciter, and transmitter products at Raytheon. Focused on RF / Microwave system theory and design, working onsite in Massachusetts.
Electrical Engineer II developing reliable power distribution equipment for Qualdoc Staffing. Collaborating cross - functionally to ensure product quality and performance with hybrid/remote flexibility.
Senior Electronics Design Engineer at Rolls - Royce responsible for circuit design and development for control systems. Collaborating in project teams to drive innovation in electronics for aerospace applications.
Senior Mechanical Engineer at Beca, delivering mechanical and piping designs for industrial projects. Collaborating with diverse teams in multiple sectors including food, beverage, and energy.
Lead civil and structural engineering initiatives at Rolls - Royce's SMR project, ensuring safety, quality, and innovation. Collaborate with multidisciplinary teams to deliver robust engineering solutions.
Senior Mask Layout Design Engineer performing physical layouts for high - speed mixed - signal circuit designs at NVIDIA. Collaborating with ASIC and mixed - signal engineers on groundbreaking sub - micron CMOS technologies and Cadence tools.