Hybrid Senior Digital IC Design Engineer

at Semtech

• Job title: Senior Digital IC Design Engineer
• Job type: Full Time
• Experience level: Senior
• Salary: $120,000 - $216,000 per year
• Degree requirement: Bachelor's Degree
• Tech skills: Perl, Python
• Location requirements: Hybrid, San Diego, United States

About the role

• Sr. Digital IC Design Engineer developing and validating digital IC blocks at Semtech. Collaborating with cross-functional teams to deliver innovative solutions in analog and mixed-signal semiconductors.

Responsibilities

• Define, develop, verify and optimize complex digital circuits for low-power mixed-signal circuits.
• Design digital hardware functions and sub/full systems in RTL code using SystemVerilog, Verilog or VHDL.
• Collaborate with system design to create digital specification definition.
• Implement design for testability (scan chain, BIST, boundary scan) and diagnosis features to support hardware testing.
• Generate technical documentation and drive design reviews.
• Define constraints, perform logic synthesis, implement or supervise physical design for timing closure, perform DFT insertion and create test vectors, perform static timing closure.
• Support development of comprehensive verification plans and testbenches, including functional verification, RTL and gate-level simulations, timing analysis, and top verification.
• Define and implement pre-silicon digital hardware emulation and FPGA prototyping.
• Support silicon lab evaluation, performance characterization and debug.
• Interface with system, embedded firmware, analog, verification and cross functional teams.
• Mentor and supervise junior engineers.
• Technical support to test, product and application engineers.

Requirements

• 10+ years of industry experience in digital integrated circuit design
• B.S. or M.S. in Electrical or Computer Engineering
• Strong analytical, synthesis and problem solving skills
• In-depth knowledge and experience in digital IC development for mixed-signal ICs, frontend-to-backend flow, timing closure, HW-SW architectures and co-design, data path, signal processing, low-power techniques, constraints development, timing analysis, system trade-offs (power, speed, hardware resources, area)
• Strong background with MCU based hardware systems (ARM, RISC-V, PIC, STM32) with memories, digital micro-architecture, interfaces, and dedicated hardware peripherals
• Proficiency in SystemVerilog/Verilog/VHDL, scripting languages (Python, Perl, tcl), debugging capabilities, and industry leading digital EDA tools (Synopsys, Cadence, Siemens)
• Knowledge of verification methodologies and tools (SystemVerilog, UVM/OVM, formal verification)
• Demonstration of technical leadership and innovation
• Experience with standard hardware protocols (I2C, I3C, SPI, MIPI)
• Hands-on experience with development boards, FPGAs, logic analyzers, oscilloscopes, supplies, multimeters and the associated measurement methods
• Independent, self-motivated, rigorous, innovating, team player and able to follow through
• Excellent verbal and written communication skills
• Knowledge of system-level aspects: signal processing, mixed-signal, embedded firmware, analog, modelling, test and application

Benefits

• Health insurance
• 401(k) plan
• Paid time off
• Flexible work arrangements
• Professional development opportunities