Hybrid FPGA Design Engineer I

Posted last week

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About the role

  • Requirements capture, ASIC / FPGA digital architecture and design using RTL, verification, and system integration.
  • Support the verification environment architecture and design using System Verilog with OVM/UVM.
  • Create written test plan, testcases, code coverage tracking, and functional coverage tracking.

Requirements

  • Typically requires a degree in Science, Technology, Engineering or Mathematics (STEM) and less than 2 years prior relevant experience.
  • Demonstrated professional experience communicating in English (verbal and written).
  • U.S. citizenship is required, as only U.S. citizens are authorized to access information under this program/contract.
  • RTL coding and simulation in VHDL, Verilog, or SystemVerilog experience.
  • Experience with debugging and root cause investigations on hardware using hardware schematics, integrated FPGA vendor debug tools, and digital lab equipment.
  • Experience using ASIC and/or FPGA design tools (e.g. Modelsim, Quartus, Vivado or other FPGA-specific tools).
  • Familiarity with the signal processing system simulation & analysis tools (e.g. Matlab, Simulink).
  • Familiarity with revision control concepts and tools (e.g. Git, Subversion).

Benefits

  • Medical, dental, and vision insurance
  • Three weeks of vacation for newly hired employees
  • Generous 401(k) plan that includes employer matching funds
  • Participation in the Employee Scholar Program (ESP)
  • Life insurance and disability coverage
  • Employee Assistance Plan, including up to 8 free counseling sessions.
  • And more!

Job title

FPGA Design Engineer I

Job type

Experience level

JuniorMid level

Salary

Not specified

Degree requirement

Bachelor's Degree

Tech skills

Location requirements

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