Senior Hardware Engineer specializing in Digital FPGA at Pico Technology. Designing and implementing RTL for high speed data acquisition architecture in a hybrid role.
Responsibilities
Lead the design and development of FPGA functionality from initial requirements through to VHDL implementation
Develop digital logic to optimise data throughput and minimise latency
Build comprehensive test benches and conduct in-system debugging
Evaluate and select FPGAs for new designs balancing performance with cost
Calculate, simulate, and prototype designs for performance and reliability
Partner with Product Line team on project scoping and estimation
Requirements
Proven experience designing and developing high performance solutions using VHDL or Verilog
A strong grasp of digital and analogue hardware design principles
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