Senior Principal Mechanical Engineer at Northrop Grumman focusing on design solutions for the Sentinel program. Involves cross - team collaboration and technical expertise in engineering.
About the role
- Hardware Engineer co-designing with vendors for AI-optimized hardware solutions. Collaborating on performance analysis and systems integration for AI infrastructure.
Responsibilities
- Co-design future hardware for programmability and performance with our hardware vendors
- Assist hardware vendors in developing optimal kernels and add support for it in our compiler
- Develop performance estimates for critical kernels for different hardware configurations and drive decisions on compute core and memory hierarchy features
- Build system performance models at different abstraction levels and carry out analysis to drive decisions on scale up, scale out, front end networking
- Work with machine learning engineers, kernel engineers and compiler developers to understand their vision and needs from high performance accelerators
- Manage communication and coordination with internal and external partners
- Influence the roadmap of hardware partners to optimize them for OpenAI’s workloads.
- Evaluate potential partners’ accelerators and platforms.
- As the scope of the role and team grows, understand and influence roadmaps for hardware partners for our datacenter networks, racks, and buildings.
Requirements
- 4+ years of industry experience, including experience harnessing compute at scale and optimizing ML platform code to run efficiently on target hardware.
- Strong experience in software/hardware co-design
- Deep understanding of GPU and/or other AI accelerators
- Experience with CUDA, Triton or a related accelerator programming language
- Experience driving Machine Learning accuracy with low precision formats
- Experience with system performance modeling and analysis to optimize ML model deployment
- Strong coding skills in C/C++ and Python
- Are familiar with the fundamentals of deep learning computing and chip architecture/microarchitecture.
- Able to actively collaborate with ML engineers, kernel writers, compiler developers, system engineers, chip architects/microarchitects
Benefits
- Medical, dental, and vision insurance for you and your family
- Mental health and wellness support
- 401(k) plan with 4% matching
- Unlimited time off and 18+ company holidays per year
- Paid parental leave (20 weeks) and family-planning support
- Annual learning & development stipend ($1,500 per year)
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