Project Engineer responsible for executing hardware design projects in industrial automation. Ensuring on - time delivery and customer satisfaction while upholding engineering standards.
About the role
- Formal Verification Engineer crafting and optimising verification flows for CPU/GPU projects at NVIDIA. Collaborating with design teams and ensuring design correctness using advanced formal techniques.
Responsibilities
- The specification, implementation, and maintenance of an integrated end-to-end formal verification flow for the formal verification team.
- Developing scripts to automate the verification process.
- Review formal setups and proofs with design and verification teams.
- Maintain and extend assertion libraries, including support for both simulation and FV.
- Identifying key behaviours for verification of DUT and creating a verification plan.
- Developing verification environment including environment assumptions, assertions and cover properties in context of the verification plan.
- Applying various FV techniques to prove correctness of digital designs.
- Debugging RTL to identify causes of failure scenarios.
Requirements
- Bachelors/Masters in Electronics & Communications or Computer Science or electrical engineering from a reputed engineering college.
- Minimum 3+ years of industry experience on formal techniques for verification.
- Strong analytical skills to tackle hard problems.
- Excellent command of scripting.
- Strong knowledge of architectures of CPU designs and digital logic.
- Good understanding of abstraction techniques for effective verification.
- Hands-on experience with HDLs such as Verilog / System Verilog.
- Understanding of temporal logic assertions.
- Preferable experience with a variety of Formal Verification Tools.
- Strong communication skills are required along with the ability to work in a dynamic product oriented team and collaborate effectively across sites.
Benefits
- Competitive salaries and a generous benefits package
Job title
Job type
Experience level
Salary
Not specified
Degree requirement
Location requirements
Senior Analog Layout Engineer executing custom analog layouts for critical circuit blocks. Collaborating with design teams and supporting silicon bring - up and debugging processes.
Senior Packaging Development Engineer managing packaging design and vendor collaboration for product lifecycle. Driving packaging automation and improvement in a Taiwan - based environment.
Reliability Test Engineer at Celestica maintaining and improving automatic test equipment for product validation. Conducting reliability testing and collaboration with cross - functional teams to ensure quality.
Engineer, Test Manufacturing (ICT) at Celestica providing tester support and improving test solutions in Thailand. Collaborating with production and internal customers for robust testing outcomes.
Associate Engineer responsible for automatic test equipment and support in manufacturing at Celestica. Focus on optimizing testing processes for product quality and efficiency.
Failure Analysis Lab Engineer conducting PCB/PCBA failure analysis at Celestica. Responsible for lab equipment operation and daily chemical/material analysis in Thailand.
Electrical Project Engineer supporting MEP systems in commercial construction. Working closely with project teams on schedules and resolving construction issues in Arizona.
Technology Engineer at PNC designing, building, and maintaining technology solutions aligned with business strategies. Collaborating to ensure quality deliverables while maintaining compliance with standards and processes.
Project Engineer enhancing mission assurance for aerospace systems at The Aerospace Corporation. Collaborating on innovative approaches, supporting cutting - edge space programs, and managing technical integrations.