Principal Engineer at Marvell developing packaging technology for high performance computing and AI. Collaborating on innovative solutions for complex signal integrity and power delivery networks.
Responsibilities
Develop packaging technology roadmap for AI XPU
Explore technologies beyond what is currently available and make recommendations
Create new package technology concepts and perform routing feasibility studies
Define package architecture and lead co-design efforts across various engineering disciplines
Partner with silicon design teams to co-optimize die floorplan and bump map requirements
Drive package qualification and reliability validation to volume readiness
Requirements
15+ years of related professional experience in mechanical engineering, material science or related fields, or master's with 12+ years, or PhD with 8+
Experience in advanced package and substrate technologies
Deep understanding of process and materials, component and board level reliability
Experience managing substrate and assembly material vendors
Deep knowledge of Electrical Engineering concepts
Experience in signal and power integrity simulations for 2.5D and 3D packages
Ability to determine optimal signal routing and package size determination
Ability to manage programs involving cross-functional teams
Strong understanding of chip-package interactions and failure mechanisms
prior experience in data center AI accelerators, networking silicon, or custom HPC silicon is ideal
Ability to influence senior stakeholders across architecture, silicon design, system platform engineering, and supply chain
Benefits
Employee stock purchase plan with a 2-year look back
Family support programs to help balance work and home life
Robust mental health resources to prioritize emotional well-being
Recognition and service awards to celebrate contributions and milestones
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