Senior Principal Engineer overseeing the packaging technology roadmap for AI XPU at Marvell. Collaborating across teams to meet high-performance computing and AI needs with advanced packaging solutions.
Responsibilities
Own the packaging technology roadmap for AI XPU, XPU-attach and Switch
Define system-level package architecture including chiplet topology, interposer/substrate scaling, power delivery network strategy, and thermal design envelope
Architect and evaluate packaging technology choices, including silicon/glass interposers, EMIB/bridge, hybrid bonding, fan-out, and 3D stacking
Lead co-design efforts across silicon design, floorplanning, PDN modeling, and mechanical/thermal reliability
Work with stakeholders to define and validate advanced design rule roadmap for interposer, substrates and packages
Work with vendors to define and validate equipment, process and material roadmap
Explore technologies beyond what is currently available, make recommendations, and create and protect IP to maximize performance
Explore technology feasibility and create proof-of-concept samples
Collaborate with IP, Si design, package design, production and test teams
Lead package material selection, substrate stack-up definition, mechanical modeling, and reliability analysis
Partner with silicon design teams to co-optimize die floorplan, bump map, TSV, and RDL requirements
Support HBM integration strategy (HBM2E / HBM3 / HBM3E) with interposer or bridge-based designs
Work with OSATs / Foundry partners to evaluate process capability, manufacturability, yield, and cost
Perform signal and power integrity trade-off analysis in partnership with SI/PI teams
Drive package qualification and reliability validation to volume readiness
Requirements
Leadership experience, either as a people manager or technical lead is a strong plus
Experience in advanced package and substrate technologies with deep understanding of process and materials, component and board level reliability, warpage and thermal management
Experience in managing substrate and assembly material vendors, substrate manufacturers, OSATs and foundries
Bachelor’s degree in Mechanical Engineering, Material Science, Electrical Engineering or related fields and 10+ years of related professional experience
OR Master’s degree and/or PhD in Electrical Engineering, Mechanical Engineering, Material Science, or related fields with 5+ years of experience
Deep understanding of advanced 2.5D/3D package technology including (a) CoWoS-S/R/L, (b) EMIB, (c) CPO, (d) CPC
Strong understanding of chip-package interactions and failure mechanism at component and board level, thermal and warpage management
Ability to manage programs involving cross-functional teams
Strong interpersonal skills and willingness to learn new things are necessary along with the ability to work with stakeholders in multiple time zones across the globe
Strong communication, presentation and documentation skills
Benefits
employee stock purchase plan with a 2-year look back
family support programs to help balance work and home life
robust mental health resources to prioritize emotional well-being
recognition and service awards to celebrate contributions and milestones
Job title
Senior Principal Engineer, Advanced Package Technology
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