Hybrid Verification Engineer – AI SoC Development

at Intel Corporation

• Job title: Verification Engineer – AI SoC Development
• Job type: Full Time
• Experience level: Senior, Lead
• Salary: $164,470 - $232,190 per year
• Degree requirement: Bachelor's Degree
• Tech skills: Perl, Python
• Location requirements: Hybrid, Folsom, United States

About the role

• Senior Verification Engineer in Intel's AI SoC team ensuring the correctness of ASIC designs. Collaborating with multi-disciplinary teams to maintain the integrity and performance of advanced AI designs.

Responsibilities

• Perform functional logic verification of integrated SoCs to ensure designs meet specifications.
• Define and develop scalable and reusable block, subsystem, and SoC verification plans, test benches, and verification environments to meet required coverage levels and confirm to microarchitecture specifications.
• Execute verification plans and define and run emulation and system simulation models to verify designs, analyze power and performance, and uncover bugs.
• Collaborate with SoC architects, microarchitects, full chip architects, RTL developers, postsilicon, and physical design teams to improve verification of complex architectural and microarchitectural features.
• Document test plans and drive technical reviews with design and architecture teams while incorporating security activities within test plans to ensure security coverage.
• Maintain and improve existing functional verification infrastructure and methodology, absorb learning from postsilicon validation quality, update test plans for missing coverages, and proliferate improvements to future products.

Requirements

• Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or Computer Science
• 7+ years of experience in ASIC/SoC verification
• Expertise in SystemVerilog and UVM methodology
• Strong understanding of digital design concepts, clock domain crossings, and power management
• Experience with verification of complex SoCs, including CPU subsystems and standard bus protocols (AXI, AHB)
• Familiarity with industry standard EDA tools, including simulators (VCS, Questa, Xcelium), coverage analysis tools, and modern waveform debug environments.
• Scripting skills (Python, Perl, TCL) for automation

Benefits

• Competitive pay
• Stock bonuses
• Health
• Retirement
• Vacation