Engineering position focused on power, thermal, and performance validation at Intel. Collaborate with teams to handle SoC level validation and optimization processes.
Responsibilities
Define, develop, and execute SoC level power, thermal, and performance validation and optimization plans across Intel products.
Ratifies optimizations from hardware/software architecture and proposes solutions to software PTP teams.
Develops power, thermal, and performance validation methodologies, executes validation plans, and collaborates with other engineers for design optimization, troubleshooting, and failure analysis.
Performs SoC level debug to identify root causes and resolve all functional and triage failures for power, thermal, and performance issues.
Develops validation infrastructure (e.g., performance monitors, behavioral checkers, state space coverage) and test environment used in validation testing.
Configures and sets up data logger for thermal data collection and analysis.
Publishes SoC level power, thermal, and performance validation reports summarizing all validation and optimization activities performed, reviews results, and communicates to relevant teams.
Works with architecture, design, verification, firmware, software, and platform teams to maintain and improve debug, validation test strategy, methodologies, and processes to ensure power, thermal, and performance meet and exceed product completive targets and specifications.
Requirements
Bachelor's Degree in Electrical Engineering, Computer Engineering or similar field with 3+ years' of relevant experience -OR- Master’s Degree in Electrical Engineering, Computer Engineering or similar field with 2+ years of relevant experience
2+ years of experience in SoC FPGA/Emulation function.
2+ years of experience in Pre-Si functional design, validation, and/or HW/FW/SW integration.
2+ years of experience on major Pre-Si platforms: logic simulation or virtual platform or FPGA, and/or emulation.
2+ years of experience of C/C++, Python Programming language
2+ years of experience in debugging for SoC-level power, thermal, and performance failures.
Experience with System (SoC) level debug using JTAG debuggers.
Expertise in system-level power management of real-time processors and systems.
Experience with performance modeling, benchmarking, and validation infrastructure setup.
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