Principal Software Engineer developing GPU-aware networking solutions for HPE, leading architecture and performance optimization efforts in high-performance computing.
Responsibilities
Architect & Deliver Scale-Up Networking
Design and implement GPU-aware networking paths for high-bandwidth, low-latency intra-node communication
Develop and optimize GPU → NIC → GPU data movement, shared memory models, and DMA pathways
Work with NVIDIA CUDA, NVLink, NCCL, and AMD ROCm, InfinityFabric, RCCL teams to integrate and optimize scale-up communication semantics
Drive improvements to DMA engines, BAR mappings, ATS/IOMMU, and GPU memory registration workflows
Enhance and extend Libfabric, UCX, CXI, SHMEMX, OpenMPI for GPU-accelerated scale-up workflows
Optimize communication collectives, transport layers, and GPU-direct capabilities
Characterize and tune multi-NIC per socket, NUMA-zone mapping, GPU locality, CQ/queue design, and CPU/GPU topology optimization
Lead upstream contributions to open-source projects (OFI, UCX, OpenMPI, RCCL/NCCL enablement)
Partner with HPC/AI ecosystem teams to shape future architectures
Own complex debugging across driver, runtime, GPU, kernel, and user-space boundaries
Develop profiling workflows using Nsight, ROCm tools, eBPF, perf, etc.
Requirements
10–15+ years building high-performance networking, GPU, or kernel-level software
Deep expertise in C/C++, Linux internals, memory management, RDMA, PCIe, IOMMU, ATS, DMA engines
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