About the role

  • Own and drive the SoC-level verification strategy, planning, and execution from testbench architecture to coverage closure.
  • Lead and mentor a team of verification engineers to deliver high-quality verification on schedule.
  • Manage SoC verification deliverables including test plan, environment, coverage metrics, and signoff criteria.
  • Experience in multiple disciplines such as board/system manufacturing and test (HW and SW), ASIC/SOC and IP verification.
  • Develop test plans and coverage models for system-level features, including interconnect fabrics (IOSF) and SoC-Level Verification.
  • Drive integration and verification of multiple IPs - including CXL, PCIe, DDR, Ethernet, FEC, Smart NIC, PCIe Switch, Audio DSP, and custom accelerators - into the SoC environment.
  • Lead debug and issue triage across SoC simulations, emulations, and pre-silicon bring-up environments.
  • Lead clock and reset verification at block level and SOC for consumer electronic products.
  • Champion advanced verification methodologies (UVM, constraint-random, coverage-driven, assertion-based verification).
  • Support silicon bring-up and post-silicon validation correlation.

Requirements

  • Bachelors degree in Electrical Engineering, Computer Engineering, or in a STEM related field of study.
  • 9+ years of experience in ASIC/SoC/FPGA functional verification.
  • 5+ years in a technical lead or DV lead role.
  • Experience leading verification for complex SoCs or high-performance subsystems.
  • Experience in SystemVerilog and UVM/OVM methodologies.
  • Experience in SoC architecture, cache coherency, IOSF Interconnects, Smart NICs, PCIe Switch and low-power verification (UPF).
  • Experience verifying protocols such as CXL, PCIe, AXI, DDR or Ethernet.
  • Experience with industry-standard EDA tools i.e. (Synopsys VCS, Cadence Xcelium, or Mentor Questa, and debug tools).
  • Experience with scripting and automation skills i.e. (Python, Perl, Makefile, or TCL).
  • Experience with Jtag based Board bring up for Hardware validation.

Benefits

  • Competitive pay
  • Stock
  • Bonuses
  • Health
  • Retirement
  • Vacation

Job title

SoC Design Verification Lead

Job type

Experience level

Senior

Salary

$186,070 - $262,680 per year

Degree requirement

Bachelor's Degree

Tech skills

Location requirements

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