Package Designer with expertise in semiconductor packaging design driving Marvell’s Photonic Fabric Package solutions. Collaborating with cross-functional teams for design manufacturability and reliability.
Responsibilities
Lead Si/package/PCB/system co-design work collaborating with downstream system design teams and upstream ASIC/PIC designers to develop a portfolio of packages that meets a huge range of performance design points, while optimizing re-use in other Marvell products
Scope all aspects of package substrate design feasibility for multi-chip SiP packaging
Lead all aspects of package layout based on I/O, SI-PI and form factor requirements, including routing, design for reliability, thermal, mechanical, manufacturability, bumping, substrate, material selection, assembly, and support for testing
Meet specifications for high-speed interfaces such as HBM, DDR, PCIe and 56G/112G SerDes
Netlist management for heterogeneous chiplet assemblies using latest EDA solutions
Supporting activities related to production and assembly of IC packages with substrate suppliers and OSATs
Actively participate in qualification of package and board level assembly with sensitivity to physics of failures for high thermo-mechanical reliability, driving appropriate test vehicle definition and design
Drive ideation and innovation of advanced package solutions and specifications with vendors to advance productization efforts by Marvell
Requirements
BS/MS/PhD in EE/ECE/MSE/ME/ChemE or related disciplines
5-10 years of experience in Semiconductor Packaging Design
Extensive experience working with advanced packaging design tools such as Cadence APD
Familiarity with MCAD tools such as AutoCAD
Familiarity with high density/high performance interconnects in various 2.5D/3D packaging technologies including InFO, CoWoS, FoCoS and EMIB
Good understanding of cross-functional packaging areas: Si floor plan, package, board layout and architecture, design rules, BOM, enabling material/process technologies, thermal, mechanical, Signal/Power Integrity, design for manufacturing, assembly, reliability, and cost
Familiarity with photonics packaging is a plus but not necessary
Proven track record of working with substrate vendors to meet design for manufacturing, yield, and reliability
Proven track record of engagement with OSATs to meet assembly requirements and drive new developments to meet new product requirements
Familiarity with High Speed Signaling best practices, Signal and Power integrity requirements
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