Hybrid Principal Engineer, Verification

at Marvell Technology

• Job title: Principal Engineer, Verification
• Job type: Full Time
• Experience level: Lead
• Salary: $158,600 - $237,600 per year
• Degree requirement: Bachelor's Degree
• Tech skills: Perl, Python
• Location requirements: Hybrid, Santa Clara, United States

About the role

• Principal Engineer focused on verification of memory subsystems for AI, Network processing, and Accelerated Compute SOCs at Marvell. Oversee complex verification methodologies and lead pre-silicon validation efforts.

Responsibilities

• Work on verification of memory subsystems of Marvell's AI/ML, Network processing, Compute, Memory Expander and Accelerated Compute SOCs and IPs.
• Develop the architecture for a functional verification environment, including reference models and bus-functional monitors and drivers using System Verilog and UVM methodology.
• Analyze designs and architectures to develop test strategies that will ensure functional correctness.
• Develop verification testplan and write tests using random techniques and coverage analysis, and work with designers to ensure it is complete.
• Debug failures and work with designers to resolve issues.
• Contribute to the development and future direction of SoC verification methodologies and environments.
• Provide leadership for a geographically dispersed team of verification professionals in pre-silicon validation of a highly complex SoC design.

Requirements

• Bachelor’s degree in Electrical engineering, Electronics, Computer engineering, or related fields with 10-15 years of experience
• Master’s degree and/or PhD in Electrical engineering, Electronics, Computer engineering, or related fields with 5-10 years of experience
• 10+ years of experience in design engineering with focus on verification
• At least 5 years of direct hands-on verification experience on PCIe, NOC, DDR, HBM, Processor cores at block, subsystem and full chip level contexts
• Strong experience developing complex/random verification environments using System Verilog/UVM
• Strong experience with writing and executing detailed verification test-plan
• Strong experience with scripting languages such as Python or Perl and EDA verification tools, as well as bug tracking and regression mechanisms
• Strong experience with object-oriented design and implementation
• Excellent communication skills to interface internally and externally with all levels of the organization and to participate in problem-solving and quality improvement activities
• Demonstrates good analytical and problem-solving skills
• Must have the ability to define problems, issues, and opportunities, analyze data, establish facts, and draw valid conclusions from various datasets
• Must have the ability to multi-task in a fast-paced environment.

Benefits

• employee stock purchase plan with a 2-year look back
• family support programs to help balance work and home life
• robust mental health resources to prioritize emotional well-being
• recognition and service awards to celebrate contributions and milestones