Senior AI Engineer designing and implementing scalable GenAI agents at one of Brazil's largest banks, promoting diversity and inclusion within the workplace.
About the role
- Senior Emulation Engineer creating and debugging emulation models for hardware validation at Intel. Collaborating with design and software teams to improve validation models.
Responsibilities
- Development and enablement of Accelerator IPs in Intel platforms
- Implement and debug complex hybrid models of SOCs, chiplet dies
- Create FPGA and Hybrid FPGA emulation models from RTL
- Define and develop new capabilities and HW/SW tools for validation
- Develop hardware collateral to be integrated with the FPGA emulation model
- Test and debug the FPGA emulation model
- Support continuous integration of model builds
- Support Software and Validation team with model use
Requirements
- Bachelor's and 6+ years or Master's and 5+ years in Electrical/Electronic Engineering, Computer Engineering, Computer Science or Communications and Electronic Engineering
- 4+ years in RTL coding proven capabilities
- Lab environment and debug skills
- FPGAs and Emulation
- Linux experience as an admin or end user
- Knowledge of Wireless and Networking Protocols
- Knowledge of PCIE Scripting languages such as TCL, Perl
Benefits
- Competitive pay
- Stock bonuses
- Health
- Retirement
- Vacation
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