Emulation Model Build Engineer at Intel, specializing in Pre-Si validation of complex server SoCs. Responsibilities include building emulation models and improving verification capabilities.
Responsibilities
Focus on emulation model build and enablement for Pre-Si validation of complex server SoCs
Build emulation models
Develop emulation testbench and infrastructure
Participate in SoC bring-up of emulation models through BIOS boot and basic directed-test functionality
Root cause and debug testbench issues, emulator environment issues, RTL and firmware bugs
Collaborate with pre-silicon emulation validation teams, providing guidance to verification teams for optimal use of emulation
Collaborate and communicate with SoC architects, micro-architects, RTL developers, firmware developers and performance engineers
Define and develop new capabilities to achieve better verification through improved emulation model usability
Improve emulation efficiency both during compilation and runtime
Requirements
Bachelor's degree in Electrical Engineering, Computer Engineering or relevant field of study with 3+ years of relevant industry experience OR Master's degree with 2+ years of relevant industry experience
Experience in IP or SOC validation
Skilled in System Verilog
Experience with scripting languages such as Python, Perl etc.
Experience with microarchitecture
Prior experience with Zebu/Palladium emulation (preferred)
Familiar with Xeon x86 reset flow (preferred)
Experience debugging RTL code using industry standard hardware simulation/emulation tools (preferred)
Proficiency in industry standard tools/flow such as Git, Make, gdb, JIRA (preferred)
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