Technical Lead responsible for developing and deploying identity governance solutions at Saviynt. Collaborating with customers and guiding junior consultants to meet client needs.
About the role
- Signal and Power Integrity Engineer working on digital PCB designs at Celestica. Collaborating with global teams for robust product development and troubleshooting signal integrity issues.
Responsibilities
- The Signal and Power Integrity Engineer will play a critical role in the planning of digital PCB designs, simulation, lab verification, and troubleshooting signal integrity issues on completed designs.
- They will also be expected to help with design review of critical PCBs for signal integrity concerns.
- Enhance designs with feedback from reviews in areas such as manufacturing, test, supply chain, reliability, industrial design and simulations.
- Develop SI and PI design for server/storage/communication products.
- Major works are to serve as the signal and power integrity analyst and designer provides the support to internal team, suppliers, and customers to deliver the new products.
- PCB material choosing and stack-up definition.
- 3D passive channel modeling, perform extraction by using electromagnetic tools.
- Perform signal integrity pre-layout and post-layout analysis in R&D phase.
- Perform static timing and signal integrity analysis of parallel (common clock, source- • synchronous) interfaces.
- Design and analysis of multi-gigabit serial links, including lab verification and tuning.
- Perform power integrity analysis on power delivery network.
- Generate and verify PCB layout rules, manage constraints for PCB layout.
Requirements
- Good communications skills and ability to work with global teams is required
- Familiar with SAS, PCIe, DDR5, Ethernet specification is a plus
- Experience with SIPI EDA tools such as Keysight ADS, Synopsis ANSYS HFSS/SIWave, Cadence PowerDC/SI for both time and frequency domain circuit simulation.
- Experience with TDR and VNA measurements.
- Proficiency in Electromagnetic, Transmission-line & S-parameters theory and modeling.
- Good understanding on power distribution, DDR and SerDes design.
- BSEE or related field with 5 years of applicable work experience or MSEE or related field with 3 years of experience.
- Experience of script languages like VB, Perl or Python.
- Use of mathematic tools like Matlab.
- Strong written and oral communication in English with customer service skills.
Benefits
- Work directly with ASIC and PCB design teams
- Cooperate with R&D team and signal test engineers on debugging, failure analysis and fixing issues discovered during test
- Duties may require extended periods of sitting and sustained visual concentration on a computer monitor or numbers and other detailed data
- Occasional travel may be required.
Job title
Job type
Experience level
Salary
Not specified
Degree requirement
Tech skills
Location requirements
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